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Points To Remember
The ratio (bus delay)/(clock period)
is a key indicator of bus design difficulty.
In summary, I'd like to just make one final point.
This point, if you haven't heard it before, or haven't recognized its importance,
will make this whole presentation worthwhile.
The output capacitance of each transceiver on a bus loads it down. It also slows it down.
A bus with capacitive loading always goes more slowly than one without,
sometimes by a factor of two or more.
This effect magnifies your bus timing ratio. It makes the bus more difficult to build
than you may have first thought.
Don't get caught short by this effect. Take the transceiver capacitance into account when you
do your timing calculations.
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