Eye received within 10Gb/s PAM-4 SERDES w/ 40" FR-4
Figures courtesy of Accelerant Networks, Inc.

This is the way I think all SERDES links should be measured.
In this picture the SERDES itself is showing you the eye as measured at the actual slicer internal to the chip, after all packaging considerations, and including any bandwidth-limiting preamplifier and AGC stages.
I claim this sort of measurement is superior to any measurement taken from the external terminals of the chip package. Someday, all chips will work like this.
(The internal-measurement feature requires additional "roving" slicer levels and one roving clock signal within the chip.)

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The eye in this picture is captured from a functioning system using a transceiver from Accelerant Networks.
The data rate is 10 Gb/s, operating over 1 meter of ordinary FR-4 backplane.
The use of PAM-4 coding (4 levels, or two bits, per data baud) reduces the required data baud rate, improving jitter, and also reduces the maximum slew rate on the transmitted signal, improving crosstalk. 

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